1. Field of the Invention
The field of art to which this invention pertains is transistor biasing circuits for a pair of operational transistors wherein means are provided to minimize variation in the collector currents of the operational transistors even though there may be variations in the factor h.sub.FE.
2. Description of the Prior Art
Prior art circuits have been developed to attempt a minimization of variation in collector currents in a transistor biasing circuit regardless of variations in the factor h.sub.FE. However such circuits have not resulted in the kind of improvement desired in modern circuit arrangements. Accordingly the present invention deals with an improvement over such prior art circuits to further minimize the variation in collector currents of such circuits regardless of the variations in the factor h.sub.FE.
Reference is had to related application Ser. No. 635,283 assigned to same assignee and filed on even date herewith.